#ifndef _MAS3587F_H_ #define _MAS3587F_H_ /****************************************************************************** This header-file contains all the MAS3587F commando's that are to be send trough the I²C protocol. All registers are 16-bit wide. Also included : all register defintions and adressings made by: Koen Kumps Date:19/10/2001 version: 1.0 ******************************************************************************/ /* COMMANDS for MAS3587F*/ void ResetMAS3587F(void); void WriteCODEC(unsigned char,unsigned char,unsigned char); void WriteMem(short,short,short,unsigned char, unsigned char, unsigned char); void ReadMem(short, short, short); short ReadCODEC(unsigned char); void WriteCONF(unsigned char,unsigned char,unsigned char); short ReadCONF(unsigned char); void Volume(unsigned char); unsigned char Equaliser(unsigned char,unsigned char,unsigned char); unsigned char Loudness(unsigned char,unsigned char,unsigned char); void CheckPUP(void); int ReadDSP(unsigned char); void WriteDSP(unsigned char,unsigned char,unsigned char,unsigned char); unsigned char MDB1(unsigned char,unsigned char,unsigned char); unsigned char MDB2(unsigned char,unsigned char); void MDB3(unsigned char); /* functions for the MAS3587F (using the above commands)*/ void InitMAS3587F(void); //Resets the MAS3587F an load default or last settings void PrintManual(void); //Prints out some info on the use of the player void Commands(void); //Switches on the input from serial port to specific command void DSPVolume(void); //Edit DSP volume matrix void ReadConfReg(void); //Reads CONTROL, DCCF and DCFR void WriteConfReg(void); //Writes to CONTROL, DCCF and DCFR void Play(void); //Analog-in to Analog-out void Stop(void); //Stop player and shut down void ReadICinfo(void); //Read the IC information void Mute(void); //Mute the "thing" void Bass_Settings(void); //To configure Bass-register void Treble_Settings(void); //To configure Treble-Register void Loudness_Settings(void); //To configure Loudness-Register void Superbass_toggle(void); //To toggle SuperBAss on/of void Micronas_Dynamic_Bass(void);//To Edit the Micronas Dynamic Bass void Decode_I2S(void); //To decode an MP3 located in flash memory tru I²S void FFWD(void); //Fast Forward void REW(void); //Rewind /* Device adressing */ /*use these if DVS-pin is connected to VSS*/ #define DR 0x3D #define DW 0x3C /*use these if DVS-pin is connected to I²CVDD*/ /* #define DR 0x3F #define DW 0x3E */ /* DSP sub adress */ #define data_write 0x68 /*write to DSP*/ #define data_read 0x69 /*read from DSP*/ /* Codec sub adress */ #define codec_write 0x6C /*write to Codec*/ #define codec_read 0x6D /*read from Codec*/ /* Registers */ /* Direct configuration */ #define CONTROL 0x6A /*write to control register*/ #define DCCF 0x76 /*write to first DC/DC config register*/ #define DCFR 0x77 /*write to second DC/DC config register*/ /* Codec Control */ #define CONV_CONF 0x00 /*Audio codec configuration*/ #define ADC_IN_MODE 0x80 /*Input mode setting control*/ #define DAC_IN_ADC 0x06 /*MIX ADC scale control*/ #define DAC_IN_DSP 0x07 /*MIX DSP scale control*/ #define DAC_OUT_MODE 0x0E /*D/A Converter output Mode control*/ #define VOLUME 0x10 /*Volume control*/ #define BALANCE 0x11 /*Balance control*/ #define AVC 0x12 /*Automatic Volume Correction control*/ #define BASS 0x14 /*BASS control*/ #define TREBLE 0x15 /*Treble control*/ #define LOUDNESS 0x1E /*Loudness control*/ #define MDB_SHAPE 0x21 /*MDB shape control bit(15 - 8)*/ #define MDB_SWITCH 0x21 /*MDB shape control bit(7 - 0)*/ #define MDB_STR 0x22 /*MDB effect strength control*/ #define MDB_HAR 0x23 /*MDB harmonics control*/ #define MDB_FC 0x24 /*MDB center frequency control*/ /* Codec Status */ #define QPEAK_L 0x0A /*A/D Converter Quasi-Peak Detector Readout LEFT*/ #define QPEAK_R 0x0B /*A/D Converter Quasi-Peak Detector Readout RIGHT*/ #define DQPEAK_L 0x0C /*Audio processing input Quasi-Peak Detector Readout LEFT*/ #define DQPEAK_R 0x0D /*Audio processing input Quasi-Peak Detector Readout RIGHT*/ /* DSP Register table */ #define PSelect_Shadow 0x6B /*Configuration of variable RAM Areas*/ #define SPIChannelStatus 0x56 /*S/PDIF Input Channel Status Bits*/ /* D0 Memory Mode selection Cells */ #define AppSelect 0x7F6 /*Application selection*/ #define AppRunning 0x7F7 /*Application running*/ #define DefaultRead 0xFFB /*Write adress for DefaultRead in this pointer*/ /* D0 Control Memory Cells */ #define EncoderControl 0x7F0 /*Encoder control*/ #define IOControlMain 0x7F1 /*Main I/O control*/ #define InterfaceControl 0x7F2 /*Interface Status control*/ #define OfreqControl 0x7F3 /*Oscillator frequency*/ #define OutClkConfig 0x7F4 /*Output Clock configuration*/ #define SpdOutBits 0x7F8 /*S/PDIF Channel Status Bits Category Code Setting*/ #define SoftMute 0x7F9 /*Soft Mute*/ #define out_LL 0x7FC /*Volume Output Control: Left -> Left Gain (decoder mode)*/ #define out_LR 0x7FD /*Volume Output Control: Left -> Right Gain (decoder mode)*/ #define out_RL 0x7FE /*Volume Output Control: Right -> Left Gain (decoder mode)*/ #define out_RR 0x7FF /*Volume Output Control: Right -> Right Gain (decoder mode)*/ /* D0 Status Memory Cells */ #define MPEGFrameCount 0xFD0 /*MPEG Frame Counter*/ #define MPEGStatus1 0xFD1 /*MPEG Header ans Status Information part1*/ #define MPEGStatus2 0xFD2 /*MPEG Header ans Status Information part2*/ #define CRCErrorCount 0xFD3 /*MPEG CRC Error Counter*/ /* D0 Status Memory Cells */ /* Ancillary Data */ #define NumberOfAncillaryBits 0xFD4 /*Number of bits in Ancillary data*/ #define AD0 0xFD5 /*Ancillary Data (Word 0) 16-bits*/ #define AD1 0xFD6 /*Ancillary Data (Word 1) 16-bits*/ #define AD2 0xFD7 /*Ancillary Data (Word 2) 16-bits*/ #define AD3 0xFD8 /*Ancillary Data (Word 3) 16-bits*/ #define AD4 0xFD9 /*Ancillary Data (Word 4) 16-bits*/ #define AD5 0xFDA /*Ancillary Data (Word 5) 16-bits*/ #define AD6 0xFDB /*Ancillary Data (Word 6) 16-bits*/ #define AD7 0xFDC /*Ancillary Data (Word 7) 16-bits*/ #define AD8 0xFDD /*Ancillary Data (Word 8) 16-bits*/ #define AD9 0xFDE /*Ancillary Data (Word 9) 16-bits*/ #define AD10 0xFDF /*Ancillary Data (Word 10) 16-bits*/ #define AD11 0xFE0 /*Ancillary Data (Word 11) 16-bits*/ #define AD12 0xFE1 /*Ancillary Data (Word 12) 16-bits*/ #define AD13 0xFE2 /*Ancillary Data (Word 13) 16-bits*/ #define AD14 0xFE3 /*Ancillary Data (Word 14) 16-bits*/ #define AD15 0xFE4 /*Ancillary Data (Word 15) 16-bits*/ #define AD16 0xFE5 /*Ancillary Data (Word 16) 16-bits*/ #define AD17 0xFE6 /*Ancillary Data (Word 17) 16-bits*/ #define AD18 0xFE7 /*Ancillary Data (Word 18) 16-bits*/ #define AD19 0xFE8 /*Ancillary Data (Word 19) 16-bits*/ #define AD20 0xFE9 /*Ancillary Data (Word 20) 16-bits*/ #define AD21 0xFEA /*Ancillary Data (Word 21) 16-bits*/ #define AD22 0xFEB /*Ancillary Data (Word 22) 16-bits*/ #define AD23 0xFEC /*Ancillary Data (Word 23) 16-bits*/ #define AD24 0xFED /*Ancillary Data (Word 24) 16-bits*/ #define AD25 0xFEE /*Ancillary Data (Word 25) 16-bits*/ #define AD26 0xFEF /*Ancillary Data (Word 26) 16-bits*/ #define AD27 0xFF0 /*Ancillary Data (Word 27) 16-bits*/ #define AD28 0xFF1 /*Ancillary Data (Word 28) 16-bits*/ /* Commands for the DSP core */ #define FREEZE 0x00 /*Special run command see page 24 of datasheet*/ #define Read_AD 0x50 /*Controller reads MPEG ancillary data from MP3-chip*/ #define Read_IC 0x70 /*Controller reads version information of MP3-chip*/ #define Read_D0 0xC0 /*Controller reads block D0 of DSP memory*/ #define Read_D1 0xD0 /*Controller reads block D1 of DSP memory*/ #define Write_D0 0xE0 /*Controller writes to block D0 of DSP memory*/ #define Write_D1 0xF0 /*Controller writes to block D1 of DSP memory*/ #define ShortRead_D0 0xE4 /*Controller reads "short" block D0 of DSP memory*/ #define ShortRead_D1 0xF4 /*Controller reads "short" block D1 of DSP memory*/ #define ShortWrite_D0 0xE4 /*Controller writes "short" to block D0 of DSP memory*/ #define ShortWrite_D1 0xF4 /*Controller writes "short" to block D1 of DSP memory*/ /*** before using these, read page 24 and following of datasheet carefully ***/ #define RUN_1 0x10 /*Execute internal program from address 1*/ #define RUN_2 0x20 /*Execute internal program from address 2*/ #define RUN_3 0x30 /*Execute internal program from address 3*/ #define Fast_PD 0x60 /*Controller downloads custom software trough PIO*/ #define ReadReg 0xA0 /*Controller reads an internal register from MP3-chip*/ #define WriteReg 0xB0 /*Controller writes to an internal register from MP3-chip*/ /******************************************************************************/ #endif /* _MAS3587F_H_ */