Francky Leyn

Francky Leyn was born in Roeselare, Belgium, in 1964. He did his military service in Germany during 1983. He received the degree of BSc in Electronics in 1989 from the Katholieke Industriële Hogeschool West-Vlaanderen, Oostende. That year, the subject of his thesis was the design of an electronic memory system for the SILAB laser writing system. The memory management was done with an 8051 microcontroller with firmware written in the language PLM51. During 1990, he was working at SIEMENS Oostkamp, Belgium, Division Research and Development Production, Laser marking. At that time, he did the architectural system level design of the SILAB system and designed a standard cell ASIC for its image sequencer. In 1993, he received the degree of MSc in Electrical and Mechanical Engineering from the Katholieke Universiteit Leuven, Belgium. The subject of his MSc thesis was semiconductor device parameter extraction with minimax optimization in the case of dominant systematic modeling residues. He is member of the IEEE.

• Microelectronics
• Analog integrated circuit design
• Design knowledge formalization - formalization languages
• Sizing methodologies
• Modeling methodologies
• Design flow
• Documentation methodologies (consider yourself warned)
• Design for Quality (DfQ)
• Device modeling
• Digital integrated circuit design

• DC modeling methodologies:
  
  For two reasons, DC modeling is important. First it represents the bulk of computational effort required to evaluate an executable model. Improving DC modeling from a computational effort point of view directly affects the required time to optimize a circuit. Secondly DC modeling is a well known source of problems in design plans. Bad DC modeling can cause DC divergencyor DC consistency problems. The method we propose is called operating point driven DC formulation. It is computationally efficient, lacks convergency and/or consistency problems and doesn't require an initial starting point since the operating point is specified directly as input.

• AC modeling methodologies:
  
  Modeling an analog integrated circuit is essential in order to design succesfully, manually or with an optimizer. Techniques that were investigated include symbolic simulation, modified nodal analysis (MNA), and assymptotic waveform evaluation (AWE). This research lead to coining of the term behavioral signal path modeling. The previous mentioned modeling methodolgies all look at the total transfer function at the top level. From a certain circuit complexity on, this makes it hard to isolate the different effects that constitute the transfer function. The basic idea behind behavioral signal path modeling is that the total transfer function is composed out of individual effects allong the signal path. These individual effects have a local character: they are determined by components connected to a node and its adjadent nodes. Behavioral signal path models give real qualitative insight in the operation of a circuit. In order to obtain behavioral signal path models, an incremental modeling methodolgy is applied. Incremental modeling allows to transform a full device circuit into a full behavioral equivalent. Incremental modeling allows to transform small-signal modeling into control theory modeling, giving the methodology a strong theoretical foundation and the availability of estabilshed software packages. The methodology is implemented in an open modeling tool called ef2EF.

• Knowledge acquisition methodologies:
  
  once a circuit has been modeled, the deduced knowledge has to be formalized into the language of a certain target engine. As formalization engine the constraint programming tool DONALD is used. The associated language is called ProCon (programming with constraints). Constraint programming is highly suited for design knowledge acquisition due to its declarativity and openess. This allows reuse for interchange of designs between different designers, redesigns for other specifications or technology migrations. A device, module, and math ProCon library were developed in order to further ease the knowledge acquisition process.

• Sizing methodologies:


The DONALD tool supports two sizing methodologies.

• Constraint based sizing: constraint based sizing allows a direct control of the design point not possible with a conventional circuit simulator. Given a certain circuit description the degree of freedom of the design is determined. Next, the operating point is directly specified with a number of branch currents and voltages equal to the degree of freedom. Then one sequentially interchanges an input with an performance variable which is at that moment still output. At the end of the sizing session, most performance variables are input.

• Optimization based sizing: for optimization based sizing, computational efficiency is of upmost importance. An operating point driven DC formulation is combined with an efficient behavioral signal path model. Appropriate scaling and sequential design space pruning and a minimax cost function formulation allow to apply an efficient local optimization algorithm. The minimax optimization algorithm of Dem'yanov and Malozemov is implemented in the optimization kernel Miniman.

• Design flow:
  
  The ef2EF system can also be used as analog sizing framework. This is made possible due to the open software architecture of the system. ef2EF is a complete modeling environment. It allows DC modeling, AC modeling, provides a link to SPICE, provides a link to symbolic analysis (Symba), can be used as bookkeeping system for hierarchical analysis, can be used for netlist conversion, and can also be used for verification purposes.

• Specification translation / design partitioning:
  
  Analog primitives or leaf cells are part of a hierarchical tree of analog building blocks. The above techniques allow sizing of these leaf cells. Specification translation translates the specificitaions of the top, system level to the different nodes of the analog tree. In order to perform this translation, one needs performance space models giving estimates of the obtainable performance.

• Documentation methodologies:
  
  Documentation should be part of any design methodolgy. Deducing a constraint is one thing. Explaining how one came to it even more important. As documentation method literate programming is used. Literate programming allows to integrate high quality documentation with code in a single document. Since the documentation is next to the code, the documentation remains consistent with the corresponding code. This way true documentation compliant to the book format paradigm is obtained. Increased explanatory power is obtained with all kind of typographical features like type style, character case, color, figures, tables, drawings, etc. Organizing information as components of a book (table of contents, chapters, sections, index) provides a variety of access methods, which have a significant impact on program comprehension. As literate programming system, the noweb system is used in combination with the LaTeX text formatting system.

• Design project:
  
  The educational follow up of a student project on the design of an operational transconductance amplifier. The students have to make a detailed analysis concerning small-signal, offset, noise, and transient analysis. They have to apply this knowledge in a manual interactive SPICE based sizing session in order to achieve given cutting edge specifications.

• Inverter project:
  
  The educational follow up of a student project on the design of a CMOS invertor. The students have to design a 1.25um CMOS silicon process from bare silicon, optimizing switching speed and gain bandwidth. This project brings the students, for their first time, in touch with dopant implantations and drive-ins, oxide growth, metal depositions, .... The circuit part includes a small-signal analysis with pole-zero plots, a noise analysis, and a transient analysis.

Dissertations

1. F. Leyn and V. Ryckaert. Study of, and solution strategy for the sensitivity problem of model parameters for submicron circuit simulation (108pp.). MSc thesis (in Dutch), UDC 621.049.77(043), K.U.Leuven, Heverlee, May 1993.
   Abstract

2. F. Leyn and I. Ooghe. Design of an image memory for laser steering with own memory management (162pp.+130pp.+2pp.). BSc thesis (in Dutch), K.I.H.W.V., Oostende, May 1989.
   Abstract

3. F. Leyn and F. Valcke. Design of a digital watch using discrete CMOS components (102pp.). Graduate thesis (in Dutch), V.T.I., Roeselare, June 23, 1982.

Journal papers

1. G.Gielen, W. Sansen, F.Leyn, M. Vogels and E. Lauwers. Regression Criteria and Their Application in Different Modeling Cases. Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, vol. 37, no. ??? pp. 113-122, November 2003.
   Abstract

2. G. Van der Plas, G. Debyser, F. Leyn, K. Lampaert, J. Vandenbussche, G. Gielen, W. Sansen, P. Veselinovic, and D. Leenaerts. AMGIE: a synthesis environment for CMOS analog integrated circuits. IEEE Transactions on Computer-Aided Design, ISSN 0278-0070, vol. 20, no. 9, pp. 1037-1058, September 2001.
   Abstract

3. F. Leyn, G. Gielen, and W. Sansen, Analog small-signal signal path modeling: Part I - Behavioral signal path modeling for analog integrated circuits. IEEE Transactions on Circuits and Systems, part II: Analog and Digital Signal Processing, ISSN 1057-7130, vol. 48, no. 7, pp. 701-711, July 2001.
   Abstract

4. F. Leyn, W. Sansen, and G. Gielen, Analog small-signal signal path modeling: Part II - Elementary transistor stages analysed with behavioral signal path modeling. IEEE Transactions on Circuits and Systems, part II: Analog and Digital Signal Processing, ISSN 1057-7130, vol. 48, no. 7, pp. 712-721, July 2001.
   Abstract

5. J. Vandenbussche, F. Leyn, G. Van der Plas, G. Gielen, and W. Sansen, A Fully-Integrated, Low-Power CMOS Particle Detector Front-End for Space Applications. IEEE Transactions on Nuclear Science, ISSN 0018-9499, vol. 45, no. 4, pp. 2272-2278, August 1998.
   Abstract

6. G. Gielen, G. Debyser, K. Lampaert, F. Leyn, K. Swings, G. Van der Plas, W. Sansen, D. Leenaerts, P. Veselinovic, and W. van Bokhoven. An analogue module generator for mixed analogue/digital ASIC design. International Journal of Circuit Theory and Applications, ISSN 0098-9886, vol. 23, no. 4, pp. 269-283, Jul.-Aug. 1995. Best paper award 1995 International Journal of Circuit Theory and Applications.
   Abstract

Conference papers

1. F. Leyn, E. Lauwers, M. Vogels, G. Gielen and W. Sansen, Regression criterion and their application in different modeling cases. In Proceedings IEEE International Symposium on Circuits and Systems (ISCAS), ISBN 0-7803-7448-7, vol. 5, pages 85-88, Scottsdale, Arizona, May 26-29, 2002. IEEE.
   Abstract

2. F. Leyn, G. Gielen, and W. Sansen, An effiecient DC root solving solving algorithm with guaranteed converence for analog integrated CMOS circuits. In Proceedings IEEE/ACM International Conference on Computer Aided Design (ICCAD), ISBN 1-58113-008-2, pages 304-307, San Jose, CA, November 8-12, 1998. IEEE.
   Abstract

3. G. Debyser, F. Leyn, G. Gielen, W. Sansen, and M. Styblinski, Efficient statistical analog IC design using symbolic methods. In Proceedings IEEE International Symposium on Circuits and Systems (ISCAS), ISBN 0-7803-4455-3, volume 6, pages 21-24, Monterey, CA, May 31 - June 3, 1998. IEEE.
   Abstract

4. F. Leyn, W. Sansen, and G. Gielen, Transforming small-signal modeling into control system modeling. In Proceedings 20^th Custom Integrated Circuits Conference (CICC), ISBN 0-7803-4292-5, pages 23.1.1-4, Santa Clara, CA, May 11-14, 1998. IEEE.
   Abstract

5. J. Vandenbussche, S. Donnay, F. Leyn, and G. Gielen, Hierarchical top-down design of analog sensor interfaces: from system-level specifications down to silicon. In Proceedings 1^th Design, Automation and Test in Europe (DATE), ISBN 0-8186-8359-7, pages 716-720, Paris, February 23-26, 1997. IEEE/ACM.
   Abstract

6. F. Leyn, W. Daems, G. Gielen, and W. Sansen, A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps. In Proceedings IEEE/ACM International Conference on Computer Aided Design (ICCAD), ISBN 0-8186-8200-0, pages 374-381, San Jose, CA, November 9-13, 1997. IEEE.
   Abstract

7. F. Leyn, W. Daems, G. Gielen, and W. Sansen. Analog circuit sizing with constraint programming modeling and minimax optimization. In Proceedings IEEE International Symposium on Circuits and Systems (ISCAS), ISBN 0-7803-3586-4, volume 3, pages 1500-1503, Hong Kong, June 9-12, 1997. IEEE.
   Abstract

8. P. Reynaert , L. Callewaert, G. Gielen, G. Debyser, K. Lampaert, F. Leyn, G. Van der Plas, W. Sansen, B. Schneider, R. Bloch, D. Orton, S. Boardman, J. Stent, J.-F. Agaesse, J.-O. Fischer-Binder, J. Riihiaho, and K. Tukkiniemi. ADMIRE: advanced mixed signal design environment. In Proceedings 3^rd IEEE international conference on electronics, circuits and systems (ICECS'96), ISBN 0-7803-3650-X, volume 1, pp. 428-431, Rodos, Greece, Oct. 13-16, 1996. IEEE.
   Abstract

9. G. Gielen, G. Debyser, S. Donnay, K. Lampaert, F. Leyn, K. Swings, G. Van der Plas, P. Wambacq, and W. Sansen. Comparison of analog synthesis using symbolic equations and simulation. In Proceedings 12^th European Conference on Circuit Theory and Design (ECCTD), ISBN 975-561-062-6, pages 79-82, Istanbul, August 27-31, 1995. IEEE/ITU-ETA.
   Abstract

10. P. Veselinovic, D. Leenaerts, W. van Bokhoven, F. Leyn, F. Proesmans, G. Gielen, and W. Sansen. A flexible topology selection program as part of an analog synthesis system. In Proceeedings European Design and Test Conference (ED&TC), ISBN 0-8186-7039-8, pages 119-123, Paris, March 6-9, 1995.
    Abstract

Workshop papers

1. F. Leyn, G. Gielen, and W. Sansen. A dc solution algorithm with attractive numerical properties applicable for designing BJT circuits. In ProRISC: IEEE Benelux workshop on circuits, systems and signal processing, Veldhoven, the Netherlands, ISBN 90-73461-24-3 pp. 373-380, nov. 30 - dec. 1, 2000.
   Abstract

2. F. Leyn, G. Gielen, and W. Sansen. Incremental modeling -- Behavioral signal-path modeling, Control system level transformations, In Medea 409 Workshop ESSCIRC on Systematic analog design environment. 2X1 p., Stockholm, Sweden, Sep. 22, 2000, Medea
   

3. F. Leyn, G. Gielen, and W. Sansen. Towards full insight in small-signal behavior of analog circuits: assessment of different symbolic analysis approaches. In Proceedings 6^th International Workshop on Symbolic Methods and applications in Circuit Design (SMACD), pp. 89-93, Lisbon, Portugal, Oct. 12-13, 2000. IST.
   Abstract

4. F. Leyn, G. Gielen, and W. Sansen, Efficient behavioral signal path transfer function evaluation. In Proceedings 10^th ProRISC (ProRISC), ISBN 90-73461-18-9, pp. 691-696, Mierlo, the Netherlands, Nov. 25-26, 1999. STW.
   Abstract

5. F. Leyn, W. Sansen, and G. Gielen, Behavioral Signal Path Modeling: a New Small-Signal Modeling Method. In Proceedings Medea A409 Workshop 24^th European Solid-State Circuits Conference (ESSCIRC) on Systematic analog design environment, The Hague, The Netherlands, Sep. 25, 1998. SADE Consortium.

6. F. Leyn, G. Gielen, W. Sansen, and P. Jores. A methodology for derivation of behavioral AC models for analog circuits. ef2EF: An open environment for modeling of analog circuits. In Proceedings 4^th International Workshop on Symbolic Methods and applications in Circuit Design (SMACD), pp. 1-5, Leuven (Heverlee), Oct. 10-11, 1996. K.U.Leuven.
   Abstract

7. G. Debyser, F. Leyn, G. Gielen, and M. Styblinski. Towards efficient statistical analog IC design using symbolic methods in DONALD/Gossip environment. In Proceedings 4^th International Workshop on Symbolic Methods and Applications in Circuit Design (SMACD), 1x2 p., Leuven (Heverlee), Oct. 10-11, 1996. K.U.Leuven
   Abstract

Manuals

• F. Leyn. ef2EF User Manual (60pp.). K.U.Leuven, Heverlee, February 1999.

Related sites

• DONALD Homepage.
• ef2EF Homepage.
• noweb Homepage.

• Computer science (I'm a UNIX^TM toolbox adept)
• Listening to music (ranging from classical music over jazz to pop)
• National and international politics/economics
• Painting/drawing

• agenda 1993-'94
• agenda 1994-'95
• agenda 1995-'96
• agenda 1996-'97
• agenda 1997-'98
• agenda 1998-'99

   Francky Leyn
   Rumbeeksesteenweg 146
   B-8800 Roeselare
   Belgium (Flanders)
   Tel: 051 / 20.42.03     +32-51-20 42 03
   Email: Francky.Leyn@telenet.be
   Homepage: http://users.telenet.be/leyn/

Last Modified: March 1, 2003
This page is maintained/copyrighted by Francky Leyn.